ECE 331 Digital System Design

Class calendar - weekly updates!

Week Date Reading assignment Lecture 1 (Tuesday) Lecture 2 (Thursday) Homeworks and solutions
1 8/27 1; 2.1-2.4;2.9;2.10 Introductions, pictures, Analog x Digital Logic gates: the beginning. HW1
2 9/3 2.5-2.8 (except 2.5.1); 4.1-4.5 Boolean Algebra (article on Boole and Shannon) Karnaugh maps HW2 HW1sol
3 9/10 4.3-4.7;5.1;5.6 Karnaugh maps & design Number systems HW3 (provided by Jan Heindel! thanks!) HW2sol
4 9/17 5.2-5.3;5.7.3;5.8 Computer Arithmetic Codes and Design HW4 HW3sol
5 9/24 5.4-5.7 Adders Carry Lookahead HW5 HW4sol
6 10/1 6.1-6.7 Mux/Demux, encoders, decoders Combinational Circuits HW6 HW5sol
7 10/8 Review-everything! No class today! Pre-midterm review EXAMple HW6sol
8 10/15 items 9.6 Midterm Hazards Midterm Solutions
9 10/22 chapter 3; page 914 (TTL) Logic gates with Mosfets TTL, fanout (the transparencies I showed in class are here) hW7 hw7 sol
10 10/29 still chapter 3 CMOS interfacing, power dissipation Propag.delay, worst case analysis hw8 hw8sol
11 11/5 ch.3 (end), ch. 7 (beginning) PAL,FPGAs, CPLD, LUTs Flip-flops hw9 hw9sol
12 11/12 ch. 7 (Tuesday) Registers
State machine analysis hw10
(XTR probls)
hw10sol
XTR sol
13 11/19 chapter 8. State machine design (Mealy, Moore) Turkey day. hw11 hw11sol
14 11/26 still ch 8 (last part) Mealy  machines and state minimization
State minimization, design examples.
Senior design projects tomorrow!
hw12 hw12sol
15 12/3 chapter 9. Check the Links site. Asynch x synch - FSM examples Final exam review. Read the Roboant BEFORE coming to class.  Install and play with that FSM, it's cool. Grand Challenge
16 12/10 all chapters! Grand Challenge is due today at 5pm. I leave my office at 5:05pm. Final exam. Please come to the usual classroom (Robinson B201) at 4:30. Exam goes to 7:15.